Computer Organization and Architecture, Second Internal Examination, S2(2022-25), June 2023

 Answer any 10 questions. Each question carries 2 marks.

(Write in not less than a paragraph)

1. What is the significance of Addressing mode? Explain any one addressing

mode.

Significance of Addressing mode

 To give programmers to facilities such as Pointers, counters for loop

controls, indexing of data and program relocation.

 To reduce the number bits in the addressing field of the Instruction.

Addressing Mode

1.Implied Mode

2.Immediate Mode

3.Register Mode (Explain any one with example)

2. What is the use of IR register.

The instruction registers (IR) is used to hold the instruction that is

currently being executed. 

3.Write about fetch-decode-execute cycle.

1. Fetch stage: The next instruction is fetched from the memory address that is

currently stored in the program counter and stored into the instruction

register. At the end of the fetch operation, the PC points to the next

instruction that will be read at the next cycle.

2. Decode stage: During this stage, the encoded instruction presented in the

instruction register is interpreted by the decoder.

3. Execute stage: The control unit of the CPU passes the decoded information

as a sequence of control signals to the relevant functional units of the CPU to

perform the actions required by the instruction, such as reading values from

registers, passing them to the ALU to perform mathematical or logic functions

on them, and writing the result back to a register. If the ALU is involved, it

sends a condition signal back to the CU. The result generated by the

operation is stored in the main memory or sent to an output device. Based on

the feedback from the ALU, the PC may be updated to a different address

from which the next instruction will be fetched.

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4.What is the purpose of program control instructions?

Program control instructions modify or change the flow of a program. It is the

instruction that alters the sequence of the program's execution, which means it

changes the value of the program counter, due to which the execution of the

program changes. 

5. Compare SRAM and DRAM.

Static RAM: It stores the binary information in flip flops and information remains valid

until power is supplied. It has faster access time and is used in implementing cache

memory.

Dynamic RAM – It stores the binary information as a charge on the capacitor. It

requires refreshing circuitry to maintain the charge on the capacitors after few

milliseconds. It contains more memory cells per unit area as compared to SRAM.

6. Compare RAM and ROM.

7. Write about branch instructions.

Branching instructions refer to the act of switching execution to a different

instruction sequence as a result of executing a branch instruction. 

The three types of branching instructions are: 

 

1. Jump (unconditional and conditional) 

 

2. Call (unconditional and conditional) 

 

3. Return (unconditional and conditional) 

8. What is page fault?

A page fault (sometimes called PF or hard fault) is an exception that the memory

management unit (MMU) raises when a process accesses a memory page without

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proper preparations. Accessing the page requires a mapping to be added to the

process's virtual address space.

9. What is MISD?

 In a MISD architecture, multiple processors execute different instructions on the

same data stream. This type of architecture is not commonly used in practice, as it

is difficult to find applications that can be decomposed into independent instruction

streams.

10. What is a bus?

In computer architecture, a bus (shortened form of the Latin omnibus, and historically

also called data highway or databus) is a communication system that transfers

data between components inside a computer, or between computers.

11. What are multiprocessor systems?

A multiprocessor system is defined as "a system with more than one processor",

and, more precisely, "a number of central processing units linked together to enable

parallel processing to take place".

12. What is space-time diagram for a pipeline?

The behavior of pipeline can be illustrated with space time diagram that the segment

or stage utilization as a function of time.

(10 x 2 =20 Marks)

Section B

Answer any 6 questions. Each question carries 5 marks.

(Write in not less than 2 pages)

13. Explain stored program organization.

The simplest way to organize a computer is to have one processor register and an

instruction code format with two parts. The first part specifies the operation to be

performed and the second specifies an address. The memory address tells the

control where to find an operand in memory. This operand is read from memory and

used as the data to be operated on together with the data stored in the processor

register.

14. Differentiate RISC and CISC.

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15. Explain Bus organization.

A bus organization is a group of conducting wires which carries information, all

the peripherals are connected to microprocessor through the bus. A system bus is

nothing just a group of wires to carry bits.

16. Explain about data transfer instructions with suitable examples.

Move instruction, load, store

17. Explain how magnetic tapes work.

Magnetic tape recording works by converting electrical audio signals into magnetic

energy, which imprints a record of the signal onto a moving tape covered in magnetic

particles. Playback is achieved by converting the recording on tape back into

electrical energy to be amplified.

18. Discuss the replacement algorithms for cache memory.

LRU

LFU

FIFO

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19. Explain address mapping using pages.

The tables execution of the address mapping is interpreted if the data in the address

space and the memory space are each split into a collection of fixed sizes. The

physical memory is broken down into sets of similar size known as blocks, which

can range from 64 to 4096 words each. The term page defines a set of address

spaces of a similar size.

Example − Suppose a page or block consists of 1K words, then address space can

be divided into 1024 pages and main memory can be divided into 32 blocks.

Even though both a page and a block are divided into sets of 1K words, a page

defines the cluster of address space, while a block defines the cluster of memory

space. The programs are also divided into pages.

Segments of programs are transferred from auxiliary memory to main memory in

records similar to the size of a page. The term page frame is at times can recognize

a block.

20. What is parallel processing?

a mode of operation in which a process is split into parts, which are executed

simultaneously on different processors attached to the same computer.

21. List and explain some techniques to prevent pipeline conflicts.

 Hardware Interlocks − Hardware interlocks are electronic circuits that detect

instructions whose source operands are destinations of instructions further up

in the pipeline. After detecting this situation, the instruction whose source is

not available is delayed by a suitable number of clock periods. In this way, the

conflict is resolved.

 Operand Forwarding − This procedure need special hardware to identify a

conflict and then prevent it by routing the information through a unique

direction between pipeline segments. This approach needed additional

hardware direction through MUXs (multiplexers).

 Delayed Branching − In this procedure, the compiler is responsible for

resolving the pipelining conflicts. The compiler identifies the branch

instructions and arranges the machine language code sequence by adding

appropriate instructions that hold the pipeline functioning without obstructions.

 Branch Prediction − This method utilizes some sort of intelligent forecasting

through appropriate logic. A pipeline with branch prediction guesses the result

of a conditional branch instruction before it is implemented. The pipeline

fetches the stream of instructions from a predicted path, thus saving the time

that is wasted by branch penalties.

 Speculative Execution − The advantage of branch prediction is that it helps

the instructions following the branch to be fetched and executed without any

delay. However, this should be completed on a speculative basis.

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(6 x 5 = 30 Marks)

Section C

Answer any 2 questions. Each question carries 15 marks

22. Describe general register organization with the help of neat diagram.

23. Explain and distinguish magnetic storage devices and optical storage devices.

24. Explain Flynn’s architectural classification scheme.

SISD

It depicts the structure of a single computer, which includes a control unit, a memory

unit, and a processor unit.

SIMD

It symbolises an organisation with a large number of processing units overseen by a

central control unit.

Because no real system has been built using the MISD structure, it is primarily of

theoretical importance.

MIMD

All processors of a parallel computer could execute distinct instructions and act on

different data at the same time in this configuration.

25. Explain instruction pipeline with example and neat diagram.

(2 X 15 = 30 Marks)